- Aries network interconnect, which is designed specifically to meet the performance requirements seen in today’s emerging class of data center GPU-accelerated applications, where high node-to-node communication performance is critical;
- A Dragonfly network topology tightly integrated with Aries that reduces communication latency for scale-out applications that rely heavily on the Message Passing Interface;
- Optional SSD-enabled DataWarp™ I/O accelerator technology, enabling software-defined provisioning of application data for improved performance;
- Next generation of the high-performance and tightly integrated Cray Linux Environment that supports a wide range of applications;
- Image-based systems management for easy upgrades, less downtime and field-tested, large-scale system deployment;
- Enhancements to Cray’s HPC-optimized programming environment for improved performance and programmability of GPU environments;
- Support for the NVIDIA® Tesla® P100 GPU accelerator as well as support for next-generation Intel® Xeon® and Intel Xeon Phi™ processors.
Cray Launches Next-Generation Supercomputer
|30 Nov-01 Dec 2017||Helsinki, Finland|
|23-27 Apr 2018||Oklahoma City, Oklahoma|
|18-22 Jun 2018||Honolulu, Hawaii|
The 2016 event was mentioned in our writeup on a startup from USC that built interest in their affordable AR device while sharing cabin space with venture capitalists onboard a chartered flight to the event.
In 2018, the IEEE Radar Conference arrives in vibrant Oklahoma City for the first time. Being centrally located in the US, OKC is known for great Southern cuisine, Midwestern hospitality, and a good helping of Wild West cowboy culture. Nearby Norman, OK is also the home of NOAA’s National Severe Storms Laboratory and the Advanced Radar Research Center at the University of Oklahoma, who collectively have driven much of the modern-day weather radar technology in the US. Do not miss this exciting week filled with novel radar advances and down-home fun.
For more than 30 years, the combined annual Symposia on VLSI Technology and Circuits has been the world’s premier mid-year conference for microelectronics technology, providing an opportunity for the world’s top device technologists, circuit and system designers to exchange leading-edge ideas. Held together since 1987, the Symposia on VLSI Technology and Circuits have alternated each year between sites in the US and Japan, enabling attendees to learn about new directions in the development of VLSI technology & circuit design through the industry’s leading research and development presentations.
The comprehensive technical programs at the two Symposia – fully overlapping again this year – are supplemented with short courses, invited speakers and several evening panel sessions. Since 2012, the Symposia have presented joint focus sessions that include invited and contributed papers on topics of mutual interest to both technology and circuit attendees. A single registration enables participants to attend both Symposia.