Acquired Electronics360

Processors

MIPS Architecture Opened to Universities

27 April 2015

Imagination Technologies Group plc has agreed to provide free access to the Verilog register-transfer level code for a configured version of the microAptiv MIPS processor as part of its Imagination University Program.

The offering is called MIPSfpga and is part of a teaching package that includes compiler and debug support, simulation and support to blow the processor into a Xilinx or Altera FPGA.

CPU architecture and design is usually taught at universities with reference to one or more of the three main architecture families in commercial use: ARM, Intel and MIPS.

The MIPS architecture is popular in universities because it is an elegant example of reduced instruction set computing (RISC) and started out as an academic exercise by John Hennessy at Stanford University. It is the subject of a standard educational text, Computer Organization and Design, by Hennesy and David Patterson.

“What we’re doing through MIPSfpga is something that hasn’t been done before with a major CPU architecture,” says Tony King-Smith, executive vice president for marketing at Imagination (Kings Langley, England), in a statement. “We’ve been working on this program for about a year as part of our focus revitalizing MIPS under Imagination. During that time, we have found great support for the program, and great love for MIPS—it is the preferred architecture for teaching,"

MIPS microAptiv design with Memory Management Unit present to allow booting of Linux operating system (click to enlarge). Source: Imagination.MIPS microAptiv design with Memory Management Unit present to allow booting of Linux operating system (click to enlarge). Source: Imagination.However, until now, commercial groups have not allowed unlicensed parties access to RTL code and have been wary of reverse-engineered clones of their processors. "No other company will give you access to RTL code," says Alexandru Voica, a technical marketing executive for Imagination.

There are numerous open-source MIPS clones available, such as Plasma, Ion, MiniMIPS and mips32r1 (see www.opencores.org). However, these are almost exclusively designed to implement the MIPS release 1 instruction set architecture (ISA), which is no longer implemented in commercial offerings.

In fact, Imagination's microAptiv is an example of the MIPS release 3 ISA. Release 3 is still a licensable variant and is the processor core within the PIC32MZ microcontroller (MCU) from Microchip Technology Inc. (Chandler, Arizona).

Since MIPS was acquired by Imagination in 2013, the ISA has moved on to Release 5 (See Imagination Volunteers 'Warrior' Cores for MCU Duty). The main difference is that MIPS r5 supports virtualization while MIPS r3 does not.

The reason that design companies, as a rule, don't show RTL code is that it could enable easier reverse engineering of their product. However, Voica says Imagination is confident this will not happen in the case of MIPSfpga.

As part of a click-through agreement on the MIPSfpga download page, users agree to use the materials for academic/non-commercial purposes and not to put the design into diffused silicon and only into FPGAs. A second part of the agreement is that if academics change or extend the design must discuss with Imagination the changes if they want to patent them.

A click-through promise may not seem like much protection against RTL code escaping into the wild, but Voica points out that foundries are wary of running illegal designs and use software to check design files for clone-like architectures and other intellectual property infringements.

So, while MIPSfpga is not open source, universities can go as deep as they like under the hood of the microAptiv, says Robert Owen, manager of the worldwide universities program at Imagination, who has spent the past 12 months putting the MIPSfpga initiative together.

The MIPSfpga deliverables were developed by David and Sarah Harris, both professors at Harvey Mudd College (Claremont, Calif.), who co-wrote Digital Design and Computer Architecture. David Harris configured the MIPS CPU and Sarah Harris developed the teaching materials.

The MIPSfpga is already running in several academic institutions that were involved in the development of the program, including Harvey Mudd College, Imperial College London, University College London and the University of Nevada-Las Vegas.

Imagination and Xilinx are co-sponsoring workshops to help professors to get started with MIPSfpga the first workshops being held at Harvey Mudd College on May 13 and 14.

Questions or comments on this story? Contact: peter.clarke@ihs.com

Related links and articles:

www.imgtec.com

www.open-cores.org

IHS MCUs and MPUs Research

News articles:



Powered by CR4, the Engineering Community

Discussion – 0 comments

By posting a comment you confirm that you have read and accept our Posting Rules and Terms of Use.
Engineering Newsletter Signup
Get the Engineering360
Stay up to date on:
Features the top stories, latest news, charts, insights and more on the end-to-end electronics value chain.
Advertisement
Weekly Newsletter
Get news, research, and analysis
on the Electronics industry in your
inbox every week - for FREE
Sign up for our FREE eNewsletter
Advertisement

CALENDAR OF EVENTS

Date Event Location
30 Nov-01 Dec 2017 Helsinki, Finland
23-27 Apr 2018 Oklahoma City, Oklahoma
18-22 Jun 2018 Honolulu, Hawaii
Find Free Electronics Datasheets
Advertisement