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Memory and Storage

Toshiba Takes 3D-NAND to 48 Layers

27 March 2015

Toshiba Corp. trumped rival NAND flash maker Samsung Electronics Co. Ltd. with the creation of what it describes as the world's first 48-layer three-dimensional NAND flash memory chip.

The Toshiba chip, announced March 26, is a two bit-per-cell chip that offers a storage density of 128-gigabit (16 gigabytes (GB)) device. Samples of products using the new process technology are available now, and mass production is expected in the first half of 2016, says the company.

Intel Corp. and Micron Technology Inc. also announced March 26 a 32-layer, 256-GB multilevel cell (MLC) and 384-GB triple-level cell (TLC) 3D NAND device that will be in production before the end of this year.

The move to production of NAND memory in a vertically stacked configuration has been anticipated for several years because of technical problems scaling NAND flash non-volatile memory cell critical dimensions below about 20 to 15 nanometers (nm). By relaxing the critical geometries of memory cells, Toshiba—and its competitors—are able to enhance the reliability of the write/erase cycling endurance and boost write speed. 3D NAND flash memories are suitable for general applications, but are being used primarily in solid-state drives (SSDs).

Dee Robinson, senior analyst for memory and storage at IHS Technology, said 3D NAND is still in its nascent stage and has yet to reach cost parity with the most advanced planar NAND process. However, NAND suppliers have no choice but to transition to 3D NAND, because scaling of planar NAND is reaching its practical limit. There is only one generation of planar NAND left before performance and reliability issues will prevent its use in normal applications.

“NAND suppliers have to transition to 3D in order to continue to drive down the cost curve,” says Robinson.

Robinson noted that mass production of the Toshiba 3D NAND is not expected to begin until the first half of 2016. The Intel-Micron 3D NAND devices will be in mass production in the fourth quarter of this year. The timing of the announcements of both products was expected, Robinson says.

“The only competitor to be left in the cold is SK Hynix, who is also working on their own 3D technology, but they are the only NAND company to not have publicly announced," Robinson says. “We expect them to also begin production towards the end of 2015.”

At present, Samsung is the leader of the pack in 3D NAND. Samsung introduced the first 3D NAND flash—a 128-Gbit device with 24 vertically stacked layers— in August 2013. The company in June 2014 introduced a new device that features 32 stacked layers and three bits per cell.

Toshiba, which works with SanDisk in NAND flash production, has been working on 3D NAND for many years. It made its first announcement about 3D NAND in June 2007, describing the technology with the terminology BiCS2 for bit-cost scalable. Towards the end of 2012, the company announced that it had 16-layer prototype devices based on a 50-nm diameter vertical channel.

Toshiba has previously announced that the 3D NAND production would start in a pilot line within phase 2 of its Fab 5, with production due in the second half of 2015. Concurrently it is also constructing a wafer fab dedicated to 3D NAND flash memory production at its Yokkaichi campus in Mie Prefecture, Japan. This fab will be completed in the first half of 2016 and is due to come on-line in the second half of 2016, says Toshiba.

Questions or comments on this story? Contact: peter.clarke@globalspec.com

Related links and articles:

www.toshiba.co.jp

IHS memory research

News articles:



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