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Data Center and Critical Infrastructure

Xilinx to Demonstrate FPGA Acceleration Technology at IBM Conference

25 April 2014

Xilinx will demonstrate the industry’s first FPGA-based acceleration technology using the IBM CAPI protocol at the upcoming IBM Impact 2014 Conference, the semiconductor company announced.

Xilinx is collaborating with IBM and the OpenPOWER Foundation to develop high-performance compute solutions that integrate IBM POWER CPUs using the CAPI protocol with Xilinx FPGAs. The IBM CAPI protocol allows sharing of memory resources between the FPGA and host, thereby reducing development cycles.

The Xilinx demonstration is a CAPI-based key value store workload acceleration engine that delivers major performance/watt acceleration at substantially lower latency, and complements the OpenCL design environment for Xilinx devices. A demonstration of the technology will be available at the OpenPOWER booth at the IBM Impact 2014 Conference, April 27-May 1.

"The development model of the OpenPOWER Foundation is one that elicits collaboration and represents a new way in exploiting and innovating around processor technology," says Brad McCredie, OpenPOWER Foundation president and IBM vice president and fellow. He added that with the Power architecture designed for Big Data and Cloud, OpenPOWER Foundation members like Xilinx can add their own innovations on top of the technology to create new applications.

Ivo Bolsens, senior vice president and chief technology officer at Xilinx, said his company is proud to be part of the consortium bringing innovation to next-generation data centers, "Our collective efforts are giving developers more choices for the way data center hardware is developed and deployed,” he said.

The OpenPOWER Foundation makes POWER hardware and software available to open development for the first time. It also is making POWER IP licensable to others, which is expanding the ecosystem of innovators on the platform. The consortium will offer open-source POWER firmware, the software that controls basic chip functions. This will enable IBM and the consortium to offer customization in creating new styles of server hardware for a variety of computing workloads.



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