Samsung Electronics Co., Ltd. has announced that is mass producing a 4Gbit DDR3 DRAM using a 20nm manufacturing process technology. The memory made using the most aggressively scaled DRAM process to date, is intended for a wide range of computing applications, Samsung said.
The announcement is unusual in that in recent years most memory manufacturers have declined to ascribe an absolute minimum geometry to a process preferring to refer to processes as 20nm-class or 30-nm class. This meant that the process could have minimum geometries of anywhere between 20nm and 29nm or between 30nm and 39nm.
For example, both Samsung and its rival SK Hynix Inc. have developed an 8Gbit LPDDR4 mobile DRAM using "20nm class" manufacturing process technology.
However, Samsung is apparently eager to show that it has pushed DRAM scaling to a record minimum using argon-fluoride immersion lithography.
Samsung has used modified double patterning and atomic layer deposition to create the capacitor-plus-transistor DRAM cell and claims the manufacturing technique established "the core technology for the next generation of 10nm-class DRAM production." Samsung said it also created ultrathin dielectric layers for the cell capacitors with an unprecedented uniformity.
Compared with the previous 25nm generation memory die are 30 percent smaller for the same capacity and modules based on 20nm 4Gbit DRAMs can save 25 percent of the energy consumed by the previous generation.
"Samsung's new energy-efficient 20-nanometer DDR3 DRAM will rapidly expand its market base throughout the IT industry including the PC and mobile markets, quickly moving to mainstream status," said Young-Hyun Jun, executive vice president, memory sales and marketing at Samsung, in a statement. "Samsung will continue to deliver next-generation DRAM and green memory solutions ahead of the competition, while contributing to the growth of the global IT market in close cooperation with our major customers."
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