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The Next Dimension of Computer Chips is Here

10 October 2017

Research collaboration between Osaka University and the Nara Institute of Science and Technology has used scanning tunneling microscopy (STM) to create images of atomically flat side-surfaces of 3D silicon crystals. This work helps semiconductor manufacturers continue to innovate while producing smaller, faster and more energy-efficient computer chips for computers and smartphones.

Spatial-derivative STM images with 200-by-200 square nanometers at Vs = +1.5 V. Flat terraces become brighter and edges darker. The downstairs direction runs from left ((110) top-surface) to right ((-1-10) back-surface). Source: Osaka UniversitySpatial-derivative STM images with 200-by-200 square nanometers at Vs = +1.5 V. Flat terraces become brighter and edges darker. The downstairs direction runs from left ((110) top-surface) to right ((-1-10) back-surface). Source: Osaka University

Today’s computers and smartphones are loaded with millions of tiny transistors. The processing speed of these devices has increased a lot over time as the number of transistors that can fit on a single computer chip continues to increase. Based on Moore’s Law, the number of transistors per chip will double every two years and in this area, it seems to be holding up. To keep up this pace of rapid innovation, computer manufacturers are continually looking for new methods to make each transistor even smaller.

Current microprocessors are made by adding patterns of circuits to flat silicon wafers. A novel way to cram more transistors in the same space is to fabricate 3D-structures. Fin-type field effect transistors (FETs) are named as such because they have fin-like silicon structures that extend into the air, off the surface of the chip. But this new method requires a silicon crystal with a perfectly flat top and side surfaces, instead of just the top surface, as is true with current devices. Designing the next generation of chips will require new knowledge of the atomic structures of the side surface.

Now, researchers at Osaka University and the Nara Institute of Science and Technology report they have used STM to image the side-surface of a silicon crystal for the first time. STM is a powerful technique that allows the locations of the individual silicon atoms to be seen. By passing a sharp tip close to the sample, electrons can jump across the gap and create an electrical current. The microscope monitored this current and determined the location of the atoms in the sample.

"Our study is a big first step toward the atomically resolved evaluation of transistors designed to have 3D-shapes," said Azusa Hattori, study co-author.

To make the side-surfaces as smooth as possible, the researchers first treated the crystals with a process called reactive ion etching.

Hidekazu Tanaka, a coauthor of the report, said “Our ability to directly look at the side-surfaces using STM proves that we can make artificial 3D structures with near-perfect atomic surface ordering."

A paper on this research was published in the Japanese Journal of Applied Physics.

To contact the author of this article, email Siobhan.Treacy@ieeeglobalspec.com


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